Digital Electronics
The gates so far were memoryless — the output depended only on the present input (combinational). A flip-flop, by contrast, is a 1-bit memory cell: its output also depends on the past state (sequential). The simplest is the SR latch: the Set input locks the output to 1, Reset to 0; while both are 0 the cell remembers its last value. With S=R=1 an undefined (forbidden) state occurs.
The D flip-flop removes this forbidden state: it has a single D (data) input and, on the clock edge, copies D to the output — "store what you see". The JK flip-flop is an enhanced SR: with J=K=1 it toggles the output, making it ideal for building counters. A crucial distinction: a latch is level-sensitive (transparent to the input while the clock is 1), whereas an edge-triggered flip-flop samples only on the clock edge (the rising/falling instant) — this is the basis of synchronous design.
Line up several flip-flops side by side and you get a register: 8 D flip-flops = one byte of temporary memory. Connect their inputs in a shifting chain and you get a shift register — it converts serial data to parallel (SPI, LED strips). Flip-flops are the building block of counters, state machines, and processor registers; they all tick in step with a shared clock.
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